Engine Sensor Simulation Card
$13,718.00
The Engine Sensor Simulation Card is a customized version of Concurrent’s programmable FPGA card specially designed for hardware-in-the-loop engine control unit (ECU) testing. The card and its associated firmware can support two- and four-cycle engines with up to sixteen cylinders and four independent, variable-phase camshafts. Engine speeds up to 30,000 rpm with 0.001 rpm resolution can be simulated along with crank reverse rotation (idling stop).
In HIL engine testing, an ECU is connected to a real-time simulation computer that executes the engine model and evaluates the ECU’s operation. An engine ECU handles a wide variety of input and output control signals that perform on the microsecond level. A single high-performance FPGA card, with its customizable firmware, can often provide an interface to the ECU that would otherwise require multiple standard data acquisition cards. An FPGA I/O card can also buffer ECU events to provide improved performance communication to and from the simulation model.
Each request is reviewed by our engineering and sales teams to ensure configuration accuracy, system compatibility, and delivery requirements.
The CP-ENG-SIM Engine Sensor Simulation PCIe Card is an FPGA-based I/O solution designed for real-time simulation of engine and vehicle sensor signals. Built for Hardware-in-the-Loop (HIL) environments, the card enables accurate emulation of crank, cam, ignition, fuel injection, and other sensor signals used in engine control systems.
Integrated within Concurrent Real-Time iHawk systems running RedHawk Linux, the card supports deterministic signal generation and acquisition, allowing engineers to validate ECU behavior under controlled, repeatable conditions.
Comprehensive Engine Signal Simulation
The card supports generation and acquisition of key engine-related signals, including:
- Crank angle sensor outputs
- Cam angle sensor outputs
- Ignition signal inputs
- Fuel injection signal inputs
- Wheel speed sensor outputs
- Knock sensor outputs
This allows full interaction with ECU systems by replicating real-world sensor behavior within a simulated environment.
High-Resolution Signal Generation
The system provides precise crank-angle-based signal generation, including:
- Arbitrary pulse pattern configuration
- Resolution of less than 0.006° crank angle at 3,000 RPM
- Waveform generation tied to crank reverse rotation
- Multi-level voltage outputs
- Pulse frequency modulation output
Support for up to four shafts allows simulation of more complex mechanical systems.
Signal Acquisition and Timing Analysis
The card supports acquisition and timing measurement for engine control signals, including:
- Up to 16 ignition signal inputs
- Up to 16 fuel injection signal inputs
- Leading and trailing edge timing capture
- Minimum pulse width of 50 nanoseconds
- Buffered pulse handling
This enables detailed analysis of ECU-generated signals within real-time test environments.
Flexible Digital and Analog I/O
The CP-ENG-SIM includes a combination of digital and analog I/O capabilities:
- 96-channel digital I/O (5V TTL, 3.3V available)
- 16-channel 16-bit digital-to-analog outputs
- 16-channel 16-bit analog inputs
Analog outputs support selectable ranges of 0 to +10V, ±5V, or ±10V, while analog inputs support ±5V or ±10V ranges, enabling integration with a variety of signal types.
Deterministic FPGA-Based Architecture
Built on an Altera Arria V FPGA, the card provides deterministic performance required for real-time simulation. The architecture supports:
- Custom FPGA module integration
- Encoder/decoder functionality
- PWM and SENT signal handling
- High-speed digital isolation
Multi-board synchronization is supported via RJ-style connectors, allowing expansion of channel counts across systems.
High-Speed Data Conversion and Throughput
The system supports:
- Up to 100K updates per second per channel for analog outputs
- Up to 300K updates per second per channel for analog inputs
This enables accurate real-time interaction between simulated signals and ECU responses.
System Integration and Software Support
The card operates within Concurrent’s real-time ecosystem, supporting:
- SIMulation Workbench (SimWB) for configuration and execution
- RedHawk Linux drivers for FPGA-based I/O
- I/O configuration independent of modeling tools
This allows engineers to integrate the card into existing simulation workflows without modifying model structures.
Hardware and System Design
The CP-ENG-SIM is implemented as a PCIe x4 full-length, full-height card and includes:
- Isolated power on all I/O
- 68-pin SCSI connectors for I/O
- RJ-45 connectors for multi-board synchronization
- Onboard clocking with programmable outputs
Optional NIST traceable calibration is available.
Applications
This card is designed for real-time automotive and control system environments, including:
- Engine control unit (ECU) testing
- Hardware-in-the-Loop (HIL) simulation
- Powertrain and drivetrain modeling
- Sensor signal emulation and validation
Specifications
Crank-Angle Sensor Signal Generation
| Pattern Configuration | Arbitrary pulse pattern configuration with less than 0.006° CA resolution at +30,000 RPM |
| Waveform Generation | Identifiable by crank reverse rotation |
| Output | Phase Multi-level voltage output; shifting (A/B-Phase); pulse frequency modulation |
Cam-Angle Sensor Signal Generation
| Pattern Configuration | Arbitrary pulse pattern configuration with less than 0.006° CA resolution at +30,000 RPM |
| Waveform | Up to 4 shafts |
| Synchronization | With crank angle |
| Variable Command | Individual phase variable command for all shafts (resolution 0.01° CA) |
Ignition and Fuel Injection Signal Acquisition
| Inputs | Up to 16 channel |
| Timing | Acquire leading/trailing edge timing of crank-angle sensor base |
| Pulse Width | Min. 50 nanoseconds; multiple pulses can be buffered |
Hardware
| 96-channel Digital I/O | 5V 4mA TTL; digital I/O direction per nibble; high speed digital isolators |
| D-to-A Output | Single-ended 16-channel 16-bit |
| D-to-A Output Voltage | 0 to +10V, +/-5V or +/-10V |
| D-to-A Output Update Rate | 100K updates/second per channel |
| D-to-A Output Details | Range selection; 10 Milliamp output drive |
| A-to-D Input | Differential or single-ended 16-channel 16-bit |
| A-to-D Input Voltage | +/-5V or +/-10V Input Range |
| A-to-D Update Rate | 300K updates/second per channel |
| Altera Arria V Family FPGA | 362K logic elements |
| DRAM | 1GB |
Features
| Clock Source | TCXO |
| Clock Generator | 8-output programmable |
| Isolated Power | All I/O |
| PCI | PCIe x4 Gen 1 |
| Connectors | RJ-45 synchronization; Industry-standard high density SCSI 68-pin connectors |
| NIST Traceable Calibration | Optional |
Packaging
| Dimensions | Full Height, Full Length PCI Express 3.8″ high, 12.3″ long |
Power Requirements
| Without External Connector | Up to 25 watts |
| With External Connector | Up to 60 watts |
Environmental
| Operating Temperature | 10° to 40° C |
| Storage Temperature | -40° to 65° C |
| Relative Humidity | 10 to 80% non-condensing |
| Cooling | Forced Air Required |
| Other | ROHS Compliant |
Ordering Information
| Engine Sensor Simulation Card | CP-ENG-SIM |
| RedHawk Linux Driver | WC-ADS6418 |
| SIMulation Workbench License | ICS-SWB-1242 |




