What is FPGA Workbench?
FPGA Workbench provides a complete development environment for building customized solutions based on Concurrent Real-Time’s programmable FPGA cards. FPGA Workbench includes a powerful GUI for selecting and configuring a wide range of pre-developed data acquisition and industry-specific modules to meet your application requirements.
FPGA Configurator
Use our FPGA Configurator to customize your solution and request a quote. Our experts will work with you to build the solution to meet your needs at your budget.
Features
Jump to Section
Programmable FPGA Cards
Concurrent Real-Time’s family of programmable FPGA PCIe cards feature a powerful field programmable gate array that supports both digital and analog I/O. The cards can control up to 96 digital I/O signals along with 16 analog inputs and 16 analog outputs. Each card’s I/O functionality is fully customizable by the user by means of the FPGA Workbench tools. The cards are available with 362K or 504K logic elements. (Model numbers: 362K: CP-FPGA-2, 504K: CP-FPGA-3)
- 96-channel digital I/O
- 16-channel 16-bit digital-to-analog conversion
- 16-channel 16-bit analog-to-digital conversion
- Altera Arria V family FPGA
- 1GB DRAM
- TCXO clock source
- 8-output programmable clock generator
- Industry standard SCSI 68-pin VHD connectors for I/O
- RJ-45 connectors for multi-board synchronization
- PCI Express x4 revision 1.0a
- Isolated power on all I/O
- Optional NIST traceable calibration
Comprehensive IP Cores
FPGA Workbench includes a powerful library of IP modules to provide the exact functionality any application needs. The library of IP modules includes pulse width modulation, analog I/O, digital I/O, SENT protocol, encoder, ignition, injection, crank/cam shaft, wheel speed sensor and change-of-state, among many others.
View a list of all IP cores
| Model | Description |
|---|---|
| ICS-FPGA-2002 | FPGA Workbench User HDL Code License |
| ICS-FPGA-2003 | FPGA Workbench LVDT/RVDT TX License |
| ICS-FPGA-2004 | FPGA Workbench LVDT/RVDT RX License |
| ICS-FPGA-2005 | FPGA Workbench Synchro TX License, 1 line |
| ICS-FPGA-2006 | FPGA Workbench Synchro RX License, 1 line |
| ICS-FPGA-2007 | FPGA Workbench Crank/Cam License, 4 lines |
| ICS-FPGA-2008 | FPGA Workbench Ignition Injection License,1 line |
| ICS-FPGA-2009 | FPGA Workbench PWM In I/O License, 1 line |
| ICS-FPGA-2010 | FPGA Workbench PWM Out I/O License, 1 line |
| ICS-FPGA-2011 | FPGA Workbench Wheel Speed Sensor Lic, 1 line |
| ICS-FPGA-2013 | FPGA Workbench SENT Receiver License, 1 line |
| ICS-FPGA-2014 | FPGA Workbench SENT Transmit License, 1 line |
| ICS-FPGA-2015 | FPGA Workbench Angular Encoder License, 1 line |
| ICS-FPGA-2016 | FPGA Workbench Angular Decoder License, 1 line |
| ICS-FPGA-2017 | FPGA Workbench Knock Sensor License, 1 line |
| ICS-FPGA-2018 | FPGA Workbench Analog Threshold Lic, 1 line |
| ICS-FPGA-2019 | FPGA Workbench 3-Phase Inverter Lic, 1 line |
| ICS-FPGA-2020 | FPGA Workbench PMSM Motor License, 1 line |
| ICS-FPGA-2021 | FPGA Workbench Wave Gen License, 1 line |
| ICS-FPGA-2022 | FPGA Workbench High-Pres Fuel Pump Lic, 1 line |
| ICS-FPGA-2023 | FPGA Workbench Change of State DIO Lic, 64 lines |
| ICS-FPGA-2024 | FPGA Workbench FOC License, 1 line |
| ICS-FPGA-2026 | FPGA Workbench UVW Encoder, 1 line |
| ICS-FPGA-2028 | FPGA Workbench Resolver TX License, 1 line |
| ICS-FPGA-2029 | FPGA Workbench Resolver RX License, 1 line |
Bit Attributes
Sensors & Transducers
User Module
Intel Altera Quartus Prime
FPGA Workbench uses the Altera Quartus Prime Standard Edition for Aria V Development software that makes it easy to customize a card to meet your exact I/O requirements. Altera tools allow users to develop and integrate their custom HDL code targeted for the Aria V FPGA on the Concurrent RealTime FPGA boards. Altera’s Qsys tool eliminates manual system integration tasks and allows you to focus on designing the custom I/O functionality you need. The Qsys system integration tool saves design time and improves productivity by automatically generating interconnect logic to connect intellectual property (IP) functions and subsystems.